Design-Reuse18h
Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
Active Participant in RISC-V academic projects worldwide and the RISC-V International Certification Steering Committee ...
Design-Reuse1d
What should you consider when building an SoC?
A system on chip (SoC) is exactly as its name suggests, an entire system on a single silicon chip. This chip or integrated ...
Design-Reuse5d
AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
AccelerComm's innovative use of vector processing cores for signal processing moves 5G satellite beyond proof-of-concept ...
Design-Reuse2d
YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
YorChip, Inc. in collaboration with its design partner SiliconIPs announces development of a 50nS latency 100G Ultra Ethernet ...
Design-Reuse4d
Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
In this blog post, we shall explore the methodology of 3D reconstruction on the multi-view object scenes, used for volumetric ...
Design-Reuse1d
Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
Logic Fruit Technologies is excited to announce its participation in Embedded World Europe 2025, taking place from March 11th ...
Design-Reuse3d
Intel in advanced talks to sell Altera to Silverlake
Intel is reported by Bloomberg to be at an advanced stage in exclusive negotiations to sell a majority stake in its FPGA unit ...
Design-Reuse2d
RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
The rise of optimized reasoning models, capable of matching the performance of massive solutions like ChatGPT, strengthens ...
Design-Reuse4d
TSMC Will Not Take Over Intel Operations, Observers Say
TSMC will not take over the chipmaking operations of struggling U.S. rival Intel, according to industry analysts.
Design-Reuse2d
Ultra Low Latency 100G MAC/PCS for edge AI supports Ultra Ethernet
SiliconIPs announces development of a 50nS latency 100G Ultra Ethernet ready Mac/PCS IP core. The IP is optimized for size, ...
Design-Reuse8d
Why RISC-V is a viable option for safety-critical applications
This article examines the technical advantages and considerations of implementing RISC-V in safety-critical environments.
Design-Reuse9d
Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
Siemens Digital Industries Software today announced that it has signed an exclusive OEM agreement for its EDA business to ...